In the microelectronics industry, surfaces that are typically scratch-free are polished for the purpose of planarizing the structure involved and/or removing unwanted material. By way of example, metals such as aluminum, copper, and tungsten are planarized. These metal surfaces are oxidized so that the polishing abrasive does not produce scratches. Moreover, there is typically a refractory metal liner underneath the aluminum, copper or tungsten providing good adhesion to the underlying insulator and good contact resistance to lower level metallizations. The liners can be niobium, tantalum and titanium alone or in combination with their nitrides, or any other refractory metal. In the dual Damascene process used for back end of the line (BEOL) applications, the line width of the metal, as well as of the SiO.sub.2 that separates them is very narrow. If the polishing process erodes the SiO.sub.2 lines, the metal lines will erode with them and their resistance will go up. Therefore, it would be desirable to provide a polishing slurry for which the liner may act as a polish stop.
Because the aluminum alloy fills the trenches etched in the insulator, the continuous aluminum layer above them is thinner with half the trench depth than above the unpatterned fields, assuming metal line width and SiO.sub.2 space width are the same. In order to remove the aluminum alloy from the fields, the patterned area is being polished long after the continuous aluminum film above it has been removed. Unless there is a robust polish stop on top of the thin SiO.sub.2 lines, the patterned area will greatly erode, leading to overly high resistance.
In another problem involved in the microelectronics industry, an exemplary conductor for BEOL applications is an aluminum copper alloy in which the percentage of copper is in the order of 0.5 wt. %. Underneath the liner is titanium, which forms TiAl.sub.3 when exposed to temperatures in excess of 350.degree. C. This metallurgy was used for the reactive ion etching process in the past, in which the metal is patterned and the insulator is polished. In the new Damascene technology where the insulator is patterned and the aluminum alloy fills the pattern by a reflow process, the excess aluminum is removed by polishing with a water-based slurry. The copper from the Al--Cu alloy goes into solution during polishing. When the polishing process reaches the titanium-rich layer underneath the TiAl.sub.3 layer, the copper plates out on it by electroless plating. The reason for this is that copper is much more electropositive than active titanium (titanium does not become passive during prior art polishing).
In the area of SiO.sub.2 polish, the most frequently used abrasive is silica, which however, does not give high polishing rates. Furthermore, certain commercially available silica slurries contain nickel impurities. When these slurries are used in microelectronics applications for the polishing of SiO.sub.2 insulators, the nickel impurity plates out on or adjacent to tungsten studs, causing a loss of reliability because of shorts.